1. Field of the Invention
This invention relates to an input buffer circuit and an input/output buffer circuit for a semiconductor memory, and also to a portable semiconductor storage such as a memory card or memory pack.
2. Description of the Related Art
FIG. 9 shows a conventional portable semiconductor storage. This storage has a static RAM 1 and a nonvolatile memory 4. The storage is connected to a terminal unit not shown. When power is supplied from the terminal unit to an external input power line 13 and the voltage of the external input power line 13 exceeds a predetermined threshold, a power control circuit 6 makes the external input power line 13 conducted to an internal power line 14 and simultaneously delivers a back-up signal of "H" level to a decoder 70 for enabling the decoder 70. Under this condition, the terminal unit can perform read/write operations of the static RAM 1 or the nonvolatile memory 4 via an address bus 16, an output enable signal line 17, a write enable signal line 18, a chip select signal line 19 and a data bus 20. Selection between the static RAM 1 and the nonvolatile memory 4 is made via the decoder 70 using a chip select address signal line 12 branched from the address bus 16. The decoder 70 generally comprises a commercially available address decoder such as Model HC 138P.
Meanwhile, in a standby mode where no power is supplied from the terminal unit, the voltage of the external input power line 13 cannot reach the predetermined threshold, thereby bringing the power control circuit 6 into a turned-off state. In this state, power is supplied to the internal power line 14 via a reverse current blocking diode 27 and a current limiting resistor 28 from a battery 29 built in the storage. Accordingly, the stored data in the static RAM 1 is held as it is. At this time, a back-up signal of "L" level is delivered from the power control circuit 6 to the decoder 70. The decoder 70 is thereby disabled so that an internal chip enable signal line 24 and a nonvolatile memory chip select signal line 26 are both turned to a "H" level for inhibiting an access to the static RAM 1 and the nonvolatile memory 4. Note that the stored data in the nonvolatile memory 4 remains the same regardless of a level of the chip select signal line 26.
In the conventional storage, as shown in FIG. 9, since a power input of the nonvolatile memory 4 is connected to the internal power line 14 as with the static RAM 1, the power consumed by the nonvolatile memory 4 is supplied from the battery 29 via the internal power line 14 in a standby mode where no power is supplied from the terminal unit to the external input power line 13.
Generally, the current consumed by the nonvolatile memory 4 is larger by about one to two orders of magnitude than the current consumed by the static RAM 1. The life time of the battery 29 is therefore substantially determined by the current consumed by the nonvolatile memory 4. This results in a problem that the data holding time of the static RAM 1 is extremely shortened.
Furthermore, if the power input of the nonvolatile memory 4 is connected to the external input power line 13 for the prolonged life time of the battery 29, the following problem would arise. More specifically, the nonvolatile memory chip select signal line 26 is held at a "H" in the standby mode, causing a current to flow out into the external input power line 13 via an input side diode 4a of the nonvolatile memory 4 as shown in FIG. 10. Consequently, the current consumed by the chip select signal line 26 would be increased to an abnormal extent. As a result, the normal operation of the decoder 70 will not be guaranteed, resulting in a fear that the life time of the battery 29 may be cut down, or the stored data in the static RAM 1 may be disappeared.
In addition, because of the static RAM 1 being directly connected to the exterior, inputs and outputs of the static RAM 1 are under a floating state. This leads to another fear that external noise is so likely to superpose that data may be changed, or the static RAM 1 may be deteriorated or destroyed.